AD4082: 20-bit, 10 MSPS, low-noise, low-power SAR ADC

The AD4082 is a high-speed, low-noise, low-distortion, 20-bit successive approximation register (SAR) analog-to-digital converter (ADC) with built-in Easy Drive functionality. The AD4082 maintains high performance (signal-to-noise + distortion (SINAD) ratio > 92 dBFS) at signal frequencies exceeding 1 MHz, enabling a wide range of high-precision, wide-bandwidth data acquisition applications. For applications where the AD4082's minimum latency is not required, the input anti-FILTERS design can be simplified by applying oversampling along with built-in digital FILTERS and decimation, thereby reducing noise and lowering the output data rate.

The AD4082's Easy Drive feature reduces both signal chain complexity and power consumption while simultaneously improving channel density and providing flexibility in component selection. The input structure of this product is designed to minimize input-dependent signal current, thus reducing settling artifacts generated by the converter. The continuous acquisition architecture allows for settling throughout the entire conversion cycle, resulting in more relaxed ADC driver settling and bandwidth requirements compared to other high-speed data converters.
The AD4082 incorporates several features that simplify data converter integration, including a low-drift reference buffer, low-dropout (LDO) regulators for generating ADC core and digital interface POWER SUPPLIES rails, and a 16K first-in, first-out (FIFO) for result data, which significantly reduces the load on the digital host. Furthermore, critical POWER SUPPLIES and reference decoupling CAPACITORS are integrated into the package to ensure optimal performance, simplify printed circuit board (PCB) layout, and reduce the overall solution footprint.

Features

20-bit resolution, no missing code
Throughput: 10 MSPS, conversion latency of 135 ns
Noise spectral density: 17.56 nV/√Hz, -161.6 dBFS/Hz
Low 1/f, low-frequency noise (0.1Hz–10Hz): 174nV rms
Low power consumption: 58.6mW at 10MSPS (typical value)
INL: ±3 ppm (typical value), ±6 ppm (maximum value)
Dynamic range: 94.7 dBFS
SNR/THD

94.4dB (typical value) / -114.5dB (typical value) (at f _IN = 1kHz)
93.8dB (typical value) / -103dB (typical value) (at f _IN = 1MHz)
Easy Drive

6V pp differential input range
Continuous signal acquisition
Linear characteristics of 5 μA/MSPS input current
Built-in low-drift reference buffer and decoupling
Built-in V _CM generation function
Digital functions and data interfaces

Conversion result FIFO, 16K sample depth
Digital averaging FILTERS with a maximum of 210 decimations
SPI settings
The data interface can be configured.

Single lane, DDR, serial LVDS, 200Mbps per lane
Dual-lane, DDR, Serial LVDS, 100Mbps per lane
Single/Quad-lane SPI data interface
package

49 balls, 5mm x 5mm CSP_BGA, 0.65mm pitch
Built-in POWER SUPPLIES decoupling CAPACITORS
Operating temperature range: -40°C to +85°C

Application

Digital Imaging
Battery cell analysis
spectroscopic analysis
ATE (Automated Testing Equipment)
High-Speed Data Acquisition
Digital Control Loop, Hardware-in-the-Loop
Power quality analysis
Source Measurement Unit
Electron microscope and X-ray microscope
Radar Level Measurement
Non-destructive testing

Order information

MODEL	TEMP RANGE	PACKAGE OPTION	PACKAGE DESCRIPTION	Packing Quantity
AD4082BBCZ	−40℃ to +85℃	BC-49-8	49-ball CSP_BGA (5mm × 5mm × 1.33mm)	Tray, 640
AD4082BBCZ-RL	−40℃ to +85℃	BC-49-8	49-ball CSP_BGA (5mm × 5mm × 1.33mm)	Reel, 4000
AD4082BBCZ-RL7	−40℃ to +85℃	BC-49-8	49-ball CSP_BGA (5mm × 5mm × 1.33mm)	Reel, 1000