
- NXP Semiconductors
- NEXT Mobility
NXP’s automotive PMICs (Power Management ICs) are advanced power management devices engineered specifically for automotive applications. They are the ideal solution for users seeking high efficiency, reliability, compact form factor, optimized power control, and enhanced development productivity.
In this two-part article, we will explore the necessity of PMICs in automotive ECUs, and provide a detailed overview of the features, advantages, and product portfolio of NXP’s automotive PMICs.
Page 2: Overview of NXP’s Automotive PMIC Portfolio and Key Product Features
NXP's Automotive PMIC Portfolio
NXP's automotive PMICs offer a broad portfolio with scalable voltage regulator configurations and functional safety levels to support processors, microcontrollers and FPGAs across a wide range of automotive applications.

High Voltage PMIC Portfolio (FS/VR Series)
Features | FS23 | FS24 | FS26 | FS56 | FS5502 | FS45 | FS65 | FS66 | FS84/85 | FS86 | VR5510 | VR5500 | |
Power Management Features | Orderable part numbers | PFS230xAMBEP PFS232xAMBEP | PFS240xAVMA0ES PFS240xAVBA0ES | PFS2630AMDA0AD | MFS5600AMEA0ES | MC33FS5502Y0ES | MC33FS45xx MC35FS45xx | MC33FS65xx MC35FS65xx | MC33FS6600M0ES | MC33FS8530A0ES MFS8416AMBP0ES | MFS8613BMDA0ES | MVR5510AMDAx | MC33VR5500V0ES |
Power Rails | 1x Buck (FS232x only) 2x/3x LDO (FS232x/FS230x) | 1x Buck 1x LDO | 2x Buck 2x LDO 1x Boost | 2x Buck | 3x Buck 1x LDO | 1x Buck 4x LDO 1x Boost | 2x Buck 3x LDO 1x Boost | 4x Buck 2x LDO 1x Boost | 4x/3x Buck (FS85x/84x) 2x LDO 1x Boost | 2x Buck 2x LDO 1x Boost | 4x Buck 4x LDO 1x Boost | 4x Buck 2x LDO 1x Boost | |
Power Rails | 1x Buck (FS232x only) 2x/3x LDO (FS232x/FS230x) | 1x Buck 1x LDO | 2x Buck 2x LDO 1x Boost | 2x Buck | 3x Buck 1x LDO | 1x Buck 4x LDO 1x Boost | 2x Buck 3x LDO 1x Boost | 4x Buck 2x LDO 1x Boost | 4x/3x Buck (FS85x/84x) 2x LDO 1x Boost | 2x Buck 2x LDO 1x Boost | 4x Buck 4x LDO 1x Boost | 4x Buck 2x LDO 1x Boost | |
VPRE HV Buck | 3.3 V to 5 V / 0.6 A (internal FET) (FS232x only) | 1.9 V to 5 V / 0.4 A (internal FET) | 3.7 V to 6.35 V / 1.5 A synch. rectification (internal FET) | 1X [1.8 V to 8 V / 3 A (internal FET)] 1X [1.8 V to 7.2 V / 10 A (external FET)] | 4.1 V and 5 V /10 A (external FET) | 6.5 V fixed/ 2.0 A Asynchronous | 6.5 V fixed/ 2.0 A Asynchronous | 3.3 V to 5 V /10 A (external FET) | 3.3 V to 5 V /10 A (external FET) | 3.3 V to 5 V /15 A with HS short-circuit protection (external FET) | 3.3 V to 5.2 V / 10 A (external FET) | 3.3 V to 5 V /10 A (external FET) | |
MCU Core Supply | 3.3 V to 5 V /100 mA or 250 mA ext.PNP LDO (FS230x only) | ー | 0.8 V to 3.35 V DCDC / 0.8 A to 1.65 A | ー | 0.8 V to 1.8 V /2.5 A DCDC | 1 V to 5 V /0.5 A LDO | 1 V to 5 V 0.8/1.5/2.2 A DCDC | 0.8 V to 1.8 V/2.5 A DCDC up to 5 A in multiphase configuration | 0.8 V to 1.8 V/2.5 A DCDC up to 5 A in multiphase configuration | ー | 0.4 V to 1.8 V / 2.5 A DCDC up to 5 A in multiphase configuration | 0.8 V to 1.8 V/2.5 A DCDC up to 5 A in multiphase configuration | |
Buck | ー | ー | ー | ー | 1 V to 3.3 V/ 2.5 A DCDC | ー | ー | 1 x (0.8 V to 1.8V/2.5 A) 1 x (1 V to 3.3 V/2.5 A) | Extra rails depending version 1 x (0.8 V to 1.8 V/2.5 A) 1 x (1 V to 3.3 V/2.5 A) | 1 x (1 V to 3.3 V/2.5 A) | 1 x (0.4 V to 1.8 V / 2.5 A DCDC) 1 x (1 V to 4.1 V / 2.5 A DCDC) | 1 x (0.8 V to 1.8 V/2.5 A) 1 x (1 V to 3.3 V/2.5 A) | |
Boost | ー | ー | HV Boost Driver Config Front/Back | ー | ー | Buck/Boost Topology on Vpre (external FET) | Buck/Boost Topology on Vpre (external FET) | Boost Converter 5 to 5.74 V/1.1 A (internal FET) | Boost Converter 5 to 5.74 V/1.1 A (internal FET) | Boost Converter 5 to 5.74 V/1.1 A (internal FET) | Boost Converter 4,5 V to 6 V / 1.1 A (internal FET) | Boost Converter 5 to 5.74 V/1.1 A (internal FET) | |
LDO | 3.3 V or 5V / 150 mA | 3.3 V or 5V / 150 mA | 2 x (3.3 V or 5 V / 400 mA) | ー | 2 x (1.1 V to 5 V/400 mA) | Vcan 5 V/100 mA Vcca 3.3 V/5 V/100 mA | Vcan 5 V/100 mA Vcca 3.3 V/5 V/100 mA | 2 x (1.1 V to 5 V/400 mA) | 2 x (1.1 V to 5 V/400 mA) | 1 x (1.5 V to 5 V/400 mA) 1 x (1.1 V to 5 V/400 mA) | 2 x (1.5 V to 5 V / 400 mA) 1 x (1.1 V to 5 V / 400 mA) | 2 x (1.1 V to 5 V/400 mA) | |
Trackers | 3.3 V/5 V/100 mA | ー | 2 x (1.2 V/1.8 V /VREF/LDO / 150 mA) (internal FET) | ー | ー | 1 x ( 3.3 V/5 V/400 mA) ext.PNP | 1 x ( 3.3 V/5 V/400 mA) ext.PNP | ー | ー | ー | ー | ー | |
Others | 150 mA with cyclic sensing and PWM capability | ー | 0.75% Vref 3.3 V or 5 V / 30 mA | ー | ー | Use Vcca as Vref | Use Vcca as Vref | ー | ー | ー | 1x HV LDO 0.8 V or 3.3 V / 10 mA | ー | |
Safety Features (listed for higher level of ASIL) | Fit for ASIL | QM/B | QM/B | B/D | QM/B | QM | B/D | B/D | D | QM/B/D | QM/B/D | QM/B/D | QM |
Watchdog | Simple | Simple | Simple / Challenger | Simple / Challenger | ー | Simple/Challenger | Simple/Challenger | Challenger | Simple/Challenge | Simple/Challenger | Simple / Challenger | ー | |
MCU Error Mon | Yes | Yes | Yes (incl. PWM) | Yes | ー | Yes | Yes | ー | Yes | Yes | Yes | ー | |
ext Vmon | Yes | Yes | 1 | Up to 4 | 1 | ー | – | 4 | Up to 4 | Up to 9 | 4 | 1 | |
BIST | ABIST | ABIST | ABIST and LBIST | ABIST and LBIST | ー | ABIST and LBIST | ABIST and LBIST | ABIST and LBIST | ABIST and LBIST | ABIST and LBIST | ABIST and LBIST | ー | |
ABIST On Demand | Yes | Yes | Yes | Yes (Option) | ー | ー | ー | ー | ー | ー | ー | ー | |
Safety Output | RSTB, FS0B, LIMP0/1/2 | LIMP0 | FS0b, FS1b, RSTB | FS0b, PGOOD1, PGOOD2 | PGOOD, RSTB | FS0b and FS1b (option) | FS0b and FS1b (option) | FS0b, PGOOD, RSTB | FS0b, PGOOD, RSTB | FS0b, PGOOD, RSTB | FS0b, FS1b, RSTB | PGOOD, RSTB | |
IC ext Monitoring | Yes | No | Yes | Yes | ー | Yes | Yes | Yes | Yes | Yes | ー | ー | |
Fault recovery Strategy | Yes | No | Yes | ー | ー | ー | ー | Yes | Yes | Yes | Yes | ー | |
Documentation/Analysis | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | ー | FMEDA, Safety Manual | FMEDA, Safety Manual | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | FMEDA, Safety Manual, FIT report, FTA, DFA audit on site | ー | |
System Features | Targeted battery system | 12 V | 12 V | 12 V | 12 V | 12 or 24 V | 12 V | 12 V | 12 or 24 V | 12 or 24 V | 12 or 24 V | 12 V | 12 V |
Low–power Off Mode (25°C) All Reg Off | 30 µA | 30 µA | 30 µA | 7 µA | 10 µA | 30 µA | 30 µA | 10 µA | 10 µA | 10 µA | 15 µA | 10 µA | |
Low–power On Mode Vpre ON / Reg could be switched On | 20 µA | Standby mode with Vpre in PFM: 20μA | Standby mode with Vpre in PFM: 29µA | Standby mode with Vpre in PFM: 65 µA | ー | ー | ー | ー | ー | ー | Standby mode with Vpre + HVLDO ON: 35 µA. Deep sleep mode: 15 µA | ー | |
GPIO | 2xHVIO, 4xLVIO, 2 Wakeup | HVIO1, LIMP0/GPO | 2 bidirectional GPIO (HV IO) | 4 GPIOs 2 x Enable | 2 x Wake inputs | ー | ー | ー | ー | 2 x Wake inputs 2 x double function GPO | ー | 2 x Wake inputs | |
AMUX (battery, I/O, temp, VREF) | Yes | Yes | Yes | ー | ー | Yes | Yes | Yes | Yes | Yes | Yes | ||
Long Duration Timer | Yes | Yes | Yes | ー | ー | Yes | Yes | ー | ー | ー | ー | ー | |
Communication | SPI/I2C | SPI | SPI | I2C | I2C | SPI | SPI | SPI | SPI/I2C | I2C | I2C | I2C | |
CAN interface | 1 | 1 | ー | ー | ー | 1 (optional) | 1 (optional) | ー | ー | ー | ー | ー | |
LIN interface | 1 | ー | ー | ー | ー | 1 (optional) | 1 (optional) | ー | ー | ー | ー | ー | |
Package (mm) | 48 QFN (7x7) | 32 QFN (5x5) | 48 LQFP EP (7x7) | 32 QFN (5x5) | 56 QFN EP (8x8) | 48 LQFP EP(7x7) | 48 LQFP EP(7x7) | 56 QFN EP (8x8) | 56 QFN EP (8x8) 48 QFN EP (7x7) | 48 QFN EP (7x7) | 56 QFN (8x8) | 56 QFN EP (8x8) | |
Typical application | Body and Comfort | Smart Access, Small Body | BMS, DC–DC, OBC, inverter, VCU, BCM, BJB | Infotainement, telematics, clusters | QM radar | Gearbox, battery management and DCDC | EPS, battery management, active suspension, inverters, gearbox and transmission | Hybrid vehicle control unit | ADAS vision and radar, safety island, domain controller | ADAS vision and radar, safety island, propulsion domain controller | Service–oriented gateway, V2X, domain controller | Radio, V2X and infotainement | |
MCU alignment | S32K1 S32K31x | NCJ29Dx KW4x | S32K3x | General | S32R274 | S32K1x | MPC574x MPC577x | S32S2x | S32R S32V | General | S32G | General | |
BYLink System Power Platform | – | – | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
Low-Voltage PMIC Portfolio (PCA/PF/VR Series)
Features | PCA9420 | PCA9450 | PCA9451 | PCA9460 | PF0100 | PF3000 | PF3001 | VR5100 | PF0300 (Pre-Production) | PF0900 (Pre-Production) | PF5020 | PF5023 | PF5024 | PF5030 | PF5103 (Pre-production) | PF5113 (Pre-Production) | PF5123 (Pre-Production) | PF52 | PF5300/PF5301/PF5302 | PF71 | PF81 | PF8101 | PF8121 | PF82 | PF8201 | |
Power Management Features | Orderable part numbers | PCA9420UKZ PCA9420BSZ | PCA9450AAHNY PCA9450BHNY PCA9450CHNY | PCA9451AHNY | PCA9460AUK PCA9460BUK PCA9460CUK | MMPF0100xxAEP | MC32PF3000xxEP | MC32PF3001xxEP | MC34VR5100xxEP | PPF0300xxxxxES | PPF09000xxxxxES | MPF5020xxxxES | MPF5023xxxxxES | MPF5024xxxxxES | PPF5030AMDA0ES | PPF5103xxxxES | PPF5113xxxxxES | PPF5123xxxxxES | MPF5200AMBxxES | MPF5300xxxxES MPF5301xxxxES MPF5302xxxxES | MPF7100xxxxES | MC33PF8100xxES | MC33PF8101A0ES MC34PF8101A0EP | MC32PF8121xxEP | MC33PF8200xxES | MC33PF8201A0ES |
Power Rails | 2x Buck 1x LDO | 6x Buck 5x LDO | 6x Buck 3x LDO | 4x Buck 5x LDO | 6x Buck 1x Boost 6x LDO | 4x Buck 1x Boost 6x LDO | 3x Buck 6x LDO | 3x Buck 1x Boost 3x LDO | 3x Buck 1x LDO | 5x Buck 3x LDO | 3x Buck 1x LDO | 3x Buck | 4x Buck | 3x Buck 2x LDO | 3x Buck 2x LDO | 3x Buck 2x LDO | 3x Buck | 2x Buck | 1x Buck | 5x Buck 2x LDO | 7x Buck 4x LDO | 5x Buck 3x LDO | 7x Buck 4x LDO | 7x Buck 4x LDO | 5x Buck 3xLDO | |
Buck | 1x(0.5 V~1.5 V or fixed 1.8 V / 250 mA , 1x(1.5 V~2.1 V, 2.7 V~3.3 V / 500 mA) | 3x(0.6 V~ 2.1875 V / 3 A) , 1x(0.6 V~3.4 V / 3 A) , 2x(0.6 V~3.4 V / 2 A) | 3x(0.6 V~2.1875 V / 2 A) , 1x(0.6 V~3.4 V / 3 A) , 1x(0.6 V~3.4 V / 2 A) , 1x(0.6 V~3.4 V / 1.5 A) | 2x(0.6 V ~3.4 V / 1 A) , 2x(0.6 V~2.1875 V / 1 A) | 1x(0.3 V~ 1.875 V / 2.5 A) , 1x(0.3 V~1.875 V / 2 A) , 1x(0.4 V~3.3 V / 2 A, 1.2 V~3.3 V / 2.5 A) , 2x(0.4 V~3.3 V / 1.25 A) , 1x(0.4 V~3.3 V / 1 A) | 1x(0.7 V~1.425 V, 1.8V, 3.3 V/1 A) , 1x(0.7 V~1.475 V/1.75 A) , 1x(1.5 V~1.85 V, 2.5 V~3.3 V/1.25 A) , 1x(0.9 V~1.65 V/1.5 A) | 1x(0.7 V~1.425 V, 1.8 V, 3.3 V/2.75 A) , 1x(1.5 V~1.85 V, 2.5 V~3.3 V/1.25 A) , 1x(0.9 V~1.65 V/1.5 A) | 1x(0.7 V~1.425 V, 1.8 V,3.3 V / 3.8 A) , 1x(1.5 V~1.85 V, 2.5 V~3.3 V / 1.25 A) , 1x(0.9 V~1.65 V / 1.5 A) | 3x(0.5 V-3.3 V / 3.5 A) | 1x(0.5 V-3.3 V / 3.5 A) , 4x(0.3 V-3.3 V / 2.5 A) | 2x (0.4 V to 1.8 V / 2.5 A) , 1 x (1 V to 4.1 V / 2.5 A) | 3x (0.4 V to 1.8 V / 2.5 A) | 4x (0.4 V to 1.8 V / 2.5 A) | 2x(0.7 V~1.5 V / 3.5 A with SVS and dual phase capability, up to 7 A) , 1x(1 V~4.1 V, 2.5 A) | 3x(0.5 V-3.3 V / 3.5 V) | 1x(0.8 V, 0.825 V, 0.9 V or 1.2 V / 2.6 A), , 1x(1.3 V, 1.5 V, 1.8 V, 2.3 V, 2.5 V, or 3.3 V / 3.5 A), , 1x(1.1 V, 1.3 V, 1.5 V,2.5 V, or 3.3 V / 2.6 A) | 3x(0.5 V-3.3 V / 3.5 A) | 2x (0.6 V to 1.2 V / 8 A) | PF5300: 1x(0.5 V – 1.2 V)/12 A , PF5301: 1x(0.5 V – 1.2 V) / 8 A , PF5302: 1x(0.5 V – 1.2 V) / 15 A | 4x (0.4 V to1.8 V / 2.5 A) multiphase , 1x (1 V to 4.1 V / 2.5 A) | 6x (0.4 V to 1.8 V / 2.5 A) multiphase , 1x (1 V to 4.1 V / 22.5 A) | 4x (0.4 V to 1.8 V / 2.5 A) multiphase 2+2 , 1x (1 V to 4.1 V / 2.5 A) | 6x (0.4 V to 1.8 V / 2.5 A) multiphase 2+2 , 1 x (1 V to 4.1 V / 2.5 A) | 6x (0.4 V to 1.8 V / 2.5 A) multiphase 4+2 , 1x (1 V to 4.1 V / 2.5 A) | 4x (0.4 V to 1.8 V / 2.5 A) multiphase 2+2 , 1 x (1 V to 4.1 V / 2.5 A) | |
Boost | - | - | - | - | 1x(5 V~ 5.15 V/600 mA) | 1x(5 V~5.15 V/600 mA) | - | 1x(5 V~5.15 V / 600 mA) | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | - | |
LDO | 1x(1.70 V~ 1.90 V / 1 mA) 1x(1.5 V~2.1 V, 2.7 V~3.3 V / 250 mA) | 1x(1.6 V~1.9 V, 3.0 V~3.3 V / 10 mA) 1x(0.8 V~ 1.15 V / 10 mA) 1x(0.8 V~3.3 V / 300 mA) 1x(0.8 V~3.3 V / 200 mA) 1x(0.8 V~ 3.3 V / 150 mA) | 1x(1.6 V~1.9 V, 3.0 V~3.3 V / 10 mA) 1x(0.8 V~3.3 V / 200 mA) 1x(1.8 V~3.3 V / 150 mA) | 3x(0.8 V~3.3 V / 250 mA) 1x(0.8 V~3.3 V / 10 mA) 1x(0.6 V~1.95 V / 250 mA) | 1x(0.8 V~1.55 V / 100 mA) 1x(0.8 V~1.55 V / 250 mA) 2x(1.8 V~3.3 V / 100 mA) 1x(1.8 V~3.3 V / 350 mA) 1x(1.8 V~3.3 V / 200 mA) | 1x(1.8 V~1.85 V, 2.85 V~3.3 V / 100 mA) 1x(2.85 V~3.3 V / 350 mA) 1x(0.8 V~1.55 V / 250 mA) 2x(1.8 V~3.3 V / 100 mA) 1x(1.8 V~3.3 V / 350 mA) | 1x(1.8 V~1.85 V, 2.85 V~3.3 V / 100 mA) 1x(2.85 V~3.3 V / 350 mA) 1x(0.8 V~1.55 V / 250 mA) 2x(1.8 V~3.3 V / 100 mA) 1x(1.8 V~3.3 V / 350 mA) | 1x(2.85 V~3.3 V / 350 mA) 1x(0.8 V~1.55 V / 250 mA) 1x(1.8 V~3.3 V / 350 mA) | 1x(0.75 V-3.3V / 500 mA) | 1x(0.75 V-3.3 V / 500 mA) 2x(0.65 V-3.3 V / 200 mA) | 1x (1.5 V to 5 V / 400 mA) | - | - | 2x(1.5 V~ 5.0 V / 400 mA) with load switch capability | 1x(0.75 V-3.3 V / 200 mA), 1x(0.75 V-3.3 V / 500 mA) | 1x(1.8 V-3.3 V / 200 mA), 1x(1.8 V-3.3 V / 250 mA) | – | – | – | 2x (0.8 V to 5 V / 400 mA) | 4x (1.5 V to 5 V / 400 mA) | 3x (1.5 V to 5 V / 400 mA) | 4x (1.5 V to 5 V / 400 mA) | 4x (1.5 V to 5 V / 400 mA) | 3x (1.5 V to 5 V / 400 mA) | |
Others | Charger | Load Switch, I2C Level Translator | Load Switch, I2C Level Translator | 4x Load Switch | Coin-cell charger | Coin-cell charger | Coin-cell charger | Coin-cell charger | - | VAON: (1.8 V-3.3 V / 10 mA) | Load switch | - | - | - | – | – | – | – | – | VSNVS1:(1.8 V / 3.0 V / 3.3 V, 10 mA) VSNVS2:(0.8 V / 0.9 V / 1.8 V, 10 mA) | VSNVS: (1.8 V / 3.0 V / 3.3 V, 10 mA) | VSNVS: (1.8 V / 3.0 V / 3.3 V, 10 mA) | VSNVS: (1.8 V / 3.0 V / 3.3 V, 10 mA) | VSNVS: (1.8 V / 3.0 V / 3.3 V, 10 mA) | VSNVS: (1.8 V / 3.0 V / 3.3 V, 10 mA) | |
Safety Features (listed for higher level of ASIL) | Fit for ASIL | QM | QM | QM | QM | QM | QM | QM | QM | QM | QM / ASIL B/D | QM / ASIL B | QM / ASIL B | QM / ASIL B | QM / ASIL B/D | QM / ASIL B/D | QM / ASIL B/D | QM / ASIL B/D | QM / ASIL B | QM / ASIL B/D | QM / ASIL B | QM | ASIL B | QM | ASIL B | ASIL B |
Watchdog | Yes | - | - | - | - | - | - | - | Simple | Simple/Challenger | Simple | Simple | Simple | Simple/Challenger | Simple/Challenger | Simple/Challenger | Simple/Challenger | Window Watchdog | Simple/Challenger | Window Watchdog | Window Watchdog | Window Watchdog | Simple | Window Watchdog | Simple | |
BIST | - | - | - | - | - | - | - | - | – | ABIST/LBIST | ABIST | ABIST | ABIST | ABIST/LBIST | ABIST/LBIST | ABIST/LBIST | ABIST/LBIST | ABIST | ABIST | ABIST | ABIST | ABIST | – | ABIST | ABIST | |
ABIST On Demand | - | - | - | - | - | - | - | - | No | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No | No | No | Yes | Yes | |
Safety Output | - | - | - | - | - | - | - | - | PGOOD | PGOOD | 5x PGOOD | 4x PGOOD | 5x PGOOD | FS0B, RSTB, PGOOD | PGOOD | PGOOD | PGOOD | PGOOD | PGOOD | FSOB, PGOOD | PGOOD | PGOOD | PGOOD | FSOB, PGOOD | FSOB, PGOOD | |
Documentation/Analysis | - | - | - | - | - | - | - | - | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | No | No | No | Yes | Yes | |
System Features | Operating Voltage (V) | 2.5 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 3.0 – 5.5 | 2.85 – 4.5 | 2.8 – 5.5 | 2.8 – 5.5 | 2.8 – 4.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.5 – 5.5 | 2.5 – 5.5 | 2.5 – 5.5 | 3.15 – 5.25 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 | 2.7 – 5.5 |
Ambient Temp Range (°C) | -40 °C to 85 °C | -40 °C to 105 °C | -40 °C to 105 °C | -40 °C to 85 °C | -40 °C to 85 °C / 105 °C | -40 °C to 85 °C / 105 °C | -40 °C to 85 °C / 105 °C | -40 °C to 105 °C | 40 °C to +125 °C | -40 °C to +125 °C | -40 °C to 105 °C / 125 °C | -40 °C to 105 °C / 125 °C | -40 °C to 105 °C / 125 °C | -40 °C to 125 °C | -40 °C to 125 °C | -40 °C to +125 °C | -40 °C to +125 °C | -40 °C to 125 °C | -40 °C to 125 °C | -40 °C to 105 °C / 125 °C | -40 °C to 85 °C / 105 °C | -40 °C to 105 °C | -40 °C to 85 °C | -40 °C to 105 °C | -40 °C to 105 °C | |
Low–power Off Mode (25°C) All Reg Off | Low power with ship mode | - | - | - | - | - | - | - | – | 3μA | – | – | – | – | – | – | – | – | 1.5uA | – | – | – | – | – | – | |
GPIO | 1.8 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | - | - | - | - | 1.8 V / 3.3 V | 1.8 V / 3.3 V / 5 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | – | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V / 5.0 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | 1.8 V / 3.3 V | |
AMUX (battery, I/O, temp, VREF) | – | – | No | – | – | - | - | - | No | – | Yes | Yes | Yes | Yes | No | No | No | Yes | No | Yes | Yes | Yes | Yes | Yes | Yes | |
Communication | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | I2C | |
Special Feature | Linear battery charger integrated | Load Switch, I2C Level Translator | Load Switch, I2C Level Translator | Load Switch | Coin-cell charger RTC Supply | Coin-cell charger & always-on RTC supply | Coin-cell charger & always-on RTC supply | Coin-cell charger RTC Supply | Spread-spectrum Clock synchronization | Spread-spectrum, Clock synchronization | Coin-cell charger RTC Supply Spread-spectrum Clock synchronization | Spread-spectrum Clock synchronization | Spread-spectrum Clock synchronization | Spread-spectrum | Spread-spectrum Clock synchronization | Spread-spectrum Clock synchronization | Spread-spectrum Clock synchronization | Spread-spectrum Clock synchronization | Adaptive voltage positioning | 2x RTC Supply Spread-spectrum Clock synchronization | RTC Supply Coin-cell charger Spread-spectrum Clock synchronization | RTC Supply Coin-cell charger Spread-spectrum Clock synchronization | RTC Supply Coin-cell charger Spread-spectrum Clock synchronization | RTC Supply Coin-cell charger Spread-spectrum Clock synchronization | RTC Supply Coin-cell charger Spread-spectrum Clock synchronization | |
Package (mm) | HVQFN24 (3 mm x 3 mm x 0.85 mm) or WLCSP25 (2.09 mm x 2.09 mm x 0.525 mm) | HVQFN56 (7 mm x 7 mm x 0.85 mm) | HVQFN56 (7 mm x 7 mm x 0.85 mm)" | WLCSP42 (2.86 mm x 2.46 mm x 0.525 mm) | QFN56 (8 mm x 8 mm x 0.85 mm) | QFN48 (7 mm x 7 mm x 0.85 mm) | QFN48 (7 mm x 7 mm x 0.85 mm) | QFN48 (7 mm x 7 mm x 0.85 mm) | HWQFN28 (4.5 mm x 4.5 mm x 0.68 mm) | HPQFN56 (8 mm x 8 mm x 0.9 mm) | HVQFN40 (6 mm x 6 mm x 0.85 mm) | HVQFN40 (6 mm x 6 mm x 0.85 mm) | HVQFN40 (6 mm x 6 mm x 0.85 mm) | HVQFN40 (6 mm x 6 mm x 0.85 mm) | HWQFN28 (4.5 mm x 4.5 mm x 0.68 mm) | HWQFN28 (4.5 mm x 4.5 mm x 0.68 mm) | HWQFN28 (4.5 mm x 4.5 mm x 0.68 mm) | PQFN32 (5 mm x 5 mm x 0.68 mm) | 3.5 mm x 4.5 mm | HVQFN48 (7 mm x 7 mm x 0.85 mm) | HVQFN56 (8 mm x 8 mm x 0.85 mm) | HVQFN56 (8 mm x 8 mm x 0.85 mm) | HVQFN56 (8 mm x 8 mm x 0.85 mm) | HVQFN56 (8 mm x 8 mm x 0.85 mm) | HVQFN56 (8 mm x 8 mm x 0.85 mm) | |
MCU alignment | i.MX RT600 i.MX RT500 (BSP available) | i.MX 8M Mini i.MX 8M Nano i.MX 8M Plus (BSP available) | i.MX 93 Family C&I versions (BSP available) | i.MX 8ULP | i.MX 6S / D / Q / QP / SL / SX (BSP available) | i.MX 7, i.MX 6SL / SX / UL | i.MX 7, i.MX 6SL / SX / UL | LS1012, LX2160 (BSP available) | – | i.MX 95 | i.MX RT117x | i.MX 8 | i.MX 8 | S32xx | – | – | – | S32R45, LX2160 | S32G3 | i.MX 8X / XL (BSP available) | i.MX 8, i.MX 8X,S32V, LS1043 / LS1046 / LA1575 / LA9358 / LX2160(BSP available) | i.MX 8, i.MX 8X (BSP available) | i.MX 8, i.MX 8X (BSP available) | i.MX 8, i.MX 8X,S32V, LS1043 / LS1046 / LA1575 / LA9358 / LX2160(BSP available) | i.MX 8, i.MX 8X,S32 V, LS1043 / LS1046 / LA1575 / LA9358 / LX2160(BSP available) | |
BYLink System Power Platform | - | - | - | - | - | - | - | - | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes | Yes |
Introducing three products from the high-voltage PMIC FS series
We will introduce three products from the high-voltage PMIC FS series.
- [ NXP Official ] System Basis Chip
FS24 Family
FS24 is a family of PMIC (SBC) devices with multi-channel power supply, power management, voltage monitoring, safety functions and CAN FD transceiver developed for automotive applications. The devices are ideal for secure car access applications using Ultra Wideband (UWB), Near Field Communication (NFC) and Bluetooth Low Energy (LE) devices, as well as compact applications requiring low power consumption, low noise and CAN FD communication. Functional safety levels range from QM to ASIL B.
The FS24 can be directly connected to a 12V vehicle battery and has 1x Buck (step-down converter) and 1x LDO (linear regulator) built-in to power the microcontroller and peripheral components.

Figure 11: Appearance of FS24

Figure 12: FS24 block diagram
Features of FS24
Power Management Solutions
- Input voltage is up to 40V DC
- 1x HVBUCK: 1.9V to 5.0V @ 2% accuracy, maximum 400mA, switching frequency 450kHz or 2.2MHz.
- 1x HVLDO: 3.3V or 5V @ 2% accuracy, max. 150mA.
System Capabilities
- Flexible device configuration with OTP (one-time programmable) memory
- Communication interface: 32-bit SPI with 8-bit CRC (max. 4MHz)
- The state machine controls three power operation modes (NORMAL, LPON, LPOFF), providing excellent low power consumption and fast wake-up performance:
- 40µA in low power consumption mode LPOFF, 25µA in LPON
*NORMAL (normal), LPON (Low-power On), and LPOFF (Low-power Off) modes are device operation modes. - Wide IO compatibility range: Supports IO voltages from 1.9V to 5V
- TSD (Thermal Shutdown): Chip overheat protection
- AMUX (Analog Multiplexer) that supports various voltage monitoring: Monitors battery voltage and internal voltage to reduce BOM
- Built-in LDT (Long Duration Timer): A programmable timer up to 194 days that can be used for transition to low-power mode and wake-up.
- Built-in CAN FD transceiver: up to 5Mbps with wake-up function, compatible with ISO 11898-2:2016 and SAE J2284 standards
- HW ID pin: Sets a value in the built-in hardware ID register based on the hardware connection state of a specific pin. The register value can be read by the microcontroller.
Safety Features
- OV/UV monitoring of voltages generated by the device. VMON_EXT pin for external voltage monitoring.
- On-demand execution of ABIST (Analog Built-in Self-Test)
- Window WD or timeout WD monitors microcontroller failures
- RSTB + 1x Fail-Safe Output (LIMP0): Asserts LIMP0 low when a fail event occurs.
Programmability
- OTP memory allows programming of output power, OV/UV monitoring voltage, power sequence and specific functions
- During the development phase, you can try out programming your own custom OTP on the evaluation board:
- -FS2400 Safety SBC Programming Socket Board (KITFS24SKTFDMEVM)
- -FS2400 Safety SBC Evaluation Board (KITFS2400FRDMEVM)
- Provides GUI tools to help you create custom OTPs:
package
- HVQFN32EP: QFN 32 pins, Exposed pad, Wettable flanks, 5 x 5 x 0.85 mm, 0.5 mm pitch
Application Examples

Figure 13: FS24 Application Block Diagram
FS23 Family
- [ NXP Official ] FS23 Safety System Basis Chip (SBC) Family with Power Management, CAN, and LIN Capabilities
FS23 is a PMIC (SBC) device family with multi-channel power supply, power management, voltage monitoring, safety functions, CAN FD and LIN transceiver (※Parts Option) developed for automotive applications. This device is ideal for power supplies for automotive body and comfort applications equipped with NXP's general-purpose microcontroller/processor S32K1/S32K31x family. It can also be used as a power supply for microcontrollers/processors other than NXP. Functional safety levels correspond to QM to ASIL B.
The FS23 can be directly connected to a 12V vehicle battery and has a built-in regulator (selectable between 1x Buck (step-down converter) or 1x LDO (linear regulator)) and 2x LDOs to power the microcontroller and peripheral components.

Figure 14: Appearance of FS23

Figure 15: FS23 block diagram
Features of FS23
*Functional differences from FS24 are shown in bold and red.
power management
- Input voltage is up to 40V DC
- IVBUCK: 3.3V or 5V@2% accuracy,max 600mA, switching frequency 450kHz or 2.2MHz.
Or HVLDO1: 3.3V or 5V @2% accuracy, max 100mA with internal PMOS or 250mA with external PNP. - HVLDO2: 3.3V or 5V @ 2% accuracy, max. 100mA.
- HVLDO3: 3.3V or 5V @ 2% accuracy, max. 150mA.
System Capabilities
- Flexible device configuration with OTP (One-Time Programmable) memory
- Communication Interface: 32-bit SPI/I2C with CRC
- State machine controls three power operation modes (NORMAL, LPON, LPOFF) for excellent low power consumption and fast wake-up performance:
- In low power consumption mode LPOFF30µA, LPON40µA (HVLDO1) or 20µA (HVBUCK).
- In LPON mode, HVBUCK or HVLDO1 is always active, and HVLDO2/3 can operate as needed.
*NORMAL, LPON (Low-power On), and LPOFF (Low-power Off) modes are the device's operating modes. - TSD (Thermal Shutdown): Chip overheat protection
- AMUX (Analog Multiplexer) that supports various voltage monitoring: Monitors battery voltage and internal voltage to reduce BOM
- Built-in LDT (Long Duration Timer): A programmable timer up to 194 days that can be used for transition to low-power mode and wake-up.
- 2x HVIO and 4x LVIO: High-voltage/low-voltage GPIO with wake-up capability.
- 4x HSD (High-side Driver), max 150mA: Cyclic sensing function. Drives LEDs with PWM signal (200Hz to 400Hz).
- Built-in CAN FD transceiver: up to 5Mbps with wake-up function, compatible with ISO 11898-2:2016 and SAE J2284 standards
- Built-in LIN transceiver: Supports LIN 2.2, ISO 17987-4, and SAE-J2602-2 standards with wake-up function (Parts option)
Safety Features
- OV/UV monitoring of voltages generated by the device. VMON_EXT pin for external voltage monitoring.
- On-demand execution of ABIST (Analog Built-in Self-Test)
- Window WD or timeout WD monitors microcontroller failures
- Equipped with FCCU-independent MCU HW monitoring function to support multiple types of applications
*FCCU (Fault Collection and Control Unit) signal: When NXP's safety MCU detects a hardware fault, this signal is used to notify an external IC of the occurrence of an abnormality. The PMIC monitors this FCCU signal and transitions the system to a safe state when a fault occurs. - RSTB + 4x fail-safe outputs (FS0B, LIMP0/1/2): LIMP0 asserts to low level when a fail event occurs.
- FS0B is low by default, LIMP0 is high by default, LIMP1/2 can be PWM driven at 1.25Hz or 100Hz in the event of a failure.
Programmability
- OTP memory allows programming of output power, OV/UV monitoring voltage, power sequence and specific functions
- Development phase, you can try out programming your own custom OTP on the evaluation board:
- Provides a GUI tool to support the creation of custom OTPs:
package
- QFN48EP: QFN 48 pins, Exposed pad, wettable franks, 7 x 7 x 0.85 mm, 0.5 mm pitch
FS26 Family
- [ NXP Official ] FS26 Low-power Safety System Basis Chip, ASIL D System Compatible
FS26 is a family of PMIC (SBC) devices with multi-channel power supply, power management, voltage monitoring and safety functions developed for automotive applications. This device is ideal for powering applications such as automotive powertrain, chassis and low-end gateways using NXP's S32K3x family of processors. It can also be used to power microcontrollers/processors other than NXP. Functional safety levels are supported from ASIL B to D.
FS26 can be directly connected to a 12V vehicle battery and has built-in 1x VPRE Buck (Step-Down Converter), 1x VCORE Buck, 1x Boost (Step-Up Converter), 2x LDO (Linear Regulator), 1x VREF (Reference Voltage), and 2x TRK (Voltage Tracker) to power the processor and peripherals.

Figure 16: Appearance of FS26

Figure 17: FS26 block diagram
Features of FS26
*Functional differences from FS23 are shown in bold and red.
power management
- Input voltage is up to 40V DC
- VPRE HVBUCK:3.7V~6.35V@Accuracy 2%, Max 1.5A, switching frequency 440kHz or 2.25MHz.
- VCORE LVBUCK: 0.8V to 3.35V @ 2% accuracy, maximum 0.8A to 1.65A (current varies by model number). Dedicated to the microcontroller core voltage. LDO2: 3.3V or 5V @ 2% accuracy, maximum 100mA.
- VBST: Boost controller, 5.0V to 18V, with external switch/diode/current sense resistor
- LDO1 and LDO2: 3.3V or 5V @ 2% accuracy, maximum400mA. Can supply power to microcontroller IO and peripheral components.
- VREF: High-precision reference voltage, 3.3V or 5V @ 0.75% accuracy, maximum 30mA. Can be used as a reference for an external ADC.
- TRK1 and TRK2: Voltage tracker, output voltage can be selected from VREF/LDO2/built-in LDO reference, maximum 150mA
System Capabilities
- Flexible device configuration with OTP (one-time programmable) memory
- Communication Interface: 32-bit SPI with CRC
- A state machine controls three power supply operating modes (NORMAL, STANDBYand LPOFF), providing excellent low power consumption and fast wake-up performance:
- 30µA in low power consumption mode LPOFF, STANDBYモード時に29µA in STANDBY mode.
- In STANDBY mode, VPRE is always active, and LDO1/2 can operate as needed.
*NORMAL, STANDBY, and LPOFF (Low-power Off) modes are device operating modes. - TSD (Thermal Shutdown): Chip overheat protection
- AMUX (Analog Multiplexer) supports various voltage monitoring: Monitors battery voltage, internal voltage,VREF, IO voltageto reduce BOM
- Built-in LDT (Long Duration Timer): A programmable timer up to 194 days that can be used for transition to low-power mode and wake-up.
- WAKE1 and WAKE2: Wake-up input pins. WAKE2 can be used as an error monitoring input for an external IC.
- GPIO1 and GPIO2: Programmable GPIOs that can be configured as wake-up inputs or normal inputs/push-pull outputs
Safety Features
- Monitors OV/UV for voltages generated by the device. Monitors external voltage with VMON_EXT.
-
On-demand ABIST (analog built-in self-test)
- ABIST and LBIST (logic built-in self-test) at startup (*Parts option) -
Monitor microcontroller failures with Simple WD or Q&A WD
*Simple WD is a method in which the microcontroller sends a seed value to reset (update) the WD timer. -
Equipped with MCU HW monitoring function that is independent of the FCCU, it supports multiple types of applications.
*FCCU (Fault Collection and Control Unit) signal: When NXP's safety MCU detects a hardware failure, this signal notifies the external IC of the occurrence of an abnormality. The PMIC monitors this FCCU signal and transitions the system to a safe state when a failure occurs. - RSTB + 2x fail-safe outputs (FS0B, FS1B): Monitors fail events and allows you to set the delay and duration for asserting FS1B to a low level when FS0B is asserted to a low level.
Programmability
- OTP memory allows programming of output power, OV/UV monitoring voltage, power sequence and specific functions
- During the development phase, you can program and test custom OTPs on the evaluation board:
- Provides a GUI tool to support the creation of custom OTPs:
package
- LQFP48: LQFP 48 pins, Exposed pad, 7 x 7 x 1.5 mm, 0.5 mm pitch
Application Examples

Figure 18: FS26 Application Block Diagram
Introducing three products from the low-voltage PMIC PF series
Introducing three products selected from the low-voltage PMIC PF series.
- [ NXP Official ] Power Management Integrated Circuit (PMIC)
PF 5020 famiry
- [ NXP Official ] PF5020 Multi-channel (5) PMIC for Automotive Applications: 4 high power and 1 low power
The PF5020 is a family of PMIC devices with multi-channel power and power management developed for automotive and industrial applications. The device is ideal for powering automotive applications with NXP's i.MX series, S32 series processors and other manufacturers' processors. The PF5020 can be used as a standalone power supply or in combination with NXP's PF8200 and FS8500 PMICs to power a variety of applications including infotainment, ADAS, vision and radar. Functional safety levels are supported up to ASIL B.
The PF5020 integrates 3x Buck (Step-Down Converters), 1x LDO (Linear Regulator), and 1x RTC LDO to power the processor and peripherals.

Figure 19: Appearance of PF5020

Figure 20: PF5020 block diagram
Features of PF5020
power management
- Input voltage is maximum 5.5V DC
-
SW1, SW2 (Buck)
- Single-phase mode: 0.4V to 1.8V @ max. 2.5A, 1.5% accuracy
- Dual-phase mode: SW1 and SW2 can be configured to bundle the output to a maximum of 5A. For core power supply.
- SW1 and SW2 have DVS (Dynamic Voltage Scaling) function
- SW2 has VTT (Voltage Termination) termination mode for use with DDR memory power supplies. - SWND1 (Buck): 1.0V to 4.1V @ max. 2.5A, accuracy 2%
- LDO1: 1.5V to 5V @ Max. 400mA. Load switch function allows individual output ON/OFF.
- VSNVS (RTC LDO): 1.8V/3.0V/3.3V @ Max. 10mA. For powering the processor's RTC (Real Time Clock) domain and charging coin battery cells.
*DVS (Dynamic Voltage Scaling) is a function that dynamically adjusts the output voltage according to load fluctuations.
*VTT (Voltage Termination) is a power supply dedicated to DDR memory, providing a reference voltage to the memory bus to enable accurate data transmission.
System Capabilities
- Flexible device configuration with OTP (one-time programmable) memory
- Communication interface: 32-bit I2C with CRC (up to 3.4MHz)
- Switching frequency spectrum spread and manual frequency adjustment mode
- The state machine controls four power operation modes (RUN, STANDBY, LP_OFF, QPU_OFF), providing excellent low power consumption and fast wake-up performance.
- TSD (Thermal Shutdown): Chip overtemperature protection
- PGOOD1-4 pin output and monitoring: PG (Power Good) indicator. The OV/UV monitoring results of each regulator are output from the PGOOD1-4 pins. Open-drain output.
-
PGOOD output and monitoring: Open-drain output programmable as a PG (power good) indicator or GPO (general purpose output).
- Used as PG indicator: Asserts the PGOOD pin when all PGOODx pins go high as a result of OV/UV monitoring of enabled regulators.
- Used as GPO: The timing of asserting the PGOOD pin during power sequencing can be programmed by OTP. - EN1/2/3/4 input: Each regulator can be individually controlled on/off by hardware pin input.
-
The XFAILB pin synchronizes the power ON/OFF sequences between multiple PMICs. Bidirectional open-drain output pin.
- XFAILB mode: When an internal fault is detected and a power OFF event occurs, the XFAILB pin is asserted to notify other PMICs before executing the OFF sequence.
*RUN, STANDBY, LP_OFF (Low-power Off), and QPU_OFF modes (even lower power consumption modes) are device operating modes.
Safety Features
- Monitors the OV/UV of the external regulator voltage generated by the device.
- On-demand ABIST (Analog Built-in Self-Test)
- Control the built-in WD Timer via I2C, and monitor the watchdog output of an external processor with WDI (watchdog input)
Programmability
- OTP memory allows programming of output power, OV/UV monitoring voltage, power sequence and specific functions
- During the development phase, you can program and test custom OTPs on the evaluation board:
- Provides a GUI tool to support the creation of custom OTPs:
package
- HVQFN40: HVQFN 40 pins, Wettable flank, 6 x 6 x 0.9 mm, 0.5 mm pitch
Application Examples

Figure 21: PF5020 Application Block Diagram
- source: PF5020, Power management integrated circuit (PMIC) for high performance applications - Data sheet
PF7100 Family
- [ NXP Official ] PF7100 7-Channel Power Management Integrated Circuit (PMIC) for High-Performance Processing Applications
The PF7100 is a family of PMIC devices with multi-channel power and power management developed for automotive and industrial applications. The device is ideal for powering automotive applications with NXP's i.MX series processors as well as processors from other manufacturers. The PF7100 can be used to power a variety of applications including infotainment and telematics. It supports functional safety levels up to ASIL B.
The PF7100 integrates 5x Buck (step-down converters), 2x LDO (linear regulators), and 2x RTC LDO to power the processor and peripherals.

Figure 22: Appearance of PF7100

Figure 23: PF7100 block diagram
Features of PF7100
*Functional differences from PF5020 are shown in bold and red.
power management
- Input voltage is maximum 5.5V DC
- SW1, SW2, SW3, SW4(Buck):
- Single-phase mode: 0.4V to 1.8V @ Max. 2.5A, 1.5% accuracy
- Dual-phase mode: SW1&SW2,SW3&SW4can be configured to bundle outputs to a maximum of 5A power supply.
- Triple-phase mode: SW1&SW2&SW3 can be configured to bundle outputs to a maximum of 7.5A power supply.
- Quad-phase mode: SW1&SW2&SW3&SW4 can be configured to bundle outputs to a maximum of 10A power supply.
- SW1, SW2, SW3, SW4 features DVS (Dynamic Voltage Scaling) function
- SW3 features VTT (Voltage Termination) termination mode for use with DDR memory power supplies. - SW5(Buck): 1.0V to 4.1V @ max. 2.5A, accuracy 2%
- LDO1, LDO2: 0.8V~5V@Max. 400mA, Accuracy 3%. Load switch function turns outputs on/off individually.
- LDO2 can be controlled by hardware or software. - VSNVS1 (RTC LDO): 1.8V/3.0V/3.3V @ 10mA max. For powering the processor's RTC (Real Time Clock) domain.
- VSNVS2 (RTC LDO): 0.8V/0.9V/1.8V@Max. 10mA.
*DVS (Dynamic Voltage Scaling) is a function that dynamically adjusts the output voltage according to load fluctuations.
*VTT (Voltage Termination) is a power supply dedicated to DDR memory, providing a reference voltage to the memory bus to enable accurate data transmission.
System Capabilities
- Flexible device configuration with OTP (one-time programmable) memory
- Communication Interface: 32-bit I2C with CRC (up to 3.4MHz)
- Switching frequency spectrum spread and manual frequency adjustment mode
- The state machine controls four power operation modes (RUN, STANDBY, LP_OFF, QPU_OFF), providing excellent low power consumption and fast wake-up performance.
- TSD (Thermal Shutdown): Chip overtemperature protection
- PGOOD1-4 pin output and monitoring: PG (Power Good) indicator. The OV/UV monitoring results of each regulator are output from the PGOOD1-4 pins. Open-drain output.
- PGOOD output and monitoring: Open-drain output programmable as a PG (power good) indicator or GPO (general purpose output).
- Used as PG indicator: Asserts the PGOOD pin when all PGx signals resulting from the OV/UV monitoring of enabled regulators are high.
- Used as GPO: The timing of asserting the PGOOD pin during power sequencing can be programmed by OTP. - EN1/2/3/4 input: Each regulator can be individually controlled on/off by hardware pin input.
-
The XFAILB pin synchronizes the power ON/OFF sequences between multiple PMICs. Bidirectional open-drain output pin.
- XFAILB mode: When an internal fault is detected and a power OFF event occurs, the XFAILB pin is asserted to notify other PMICs before executing the OFF sequence.
- XINTB pin: The INTB pin of the PMIC used in combination is fed to XINTB to trigger an interrupt event in the device, allowing the MCU to identify the interrupt source.
- EWARN pin: Notifies the outside world that a power outage event will occur soon due to fault detection.
- FSOB pin: Safety output. Keeps the system in a safe state during power up or a fail event.
*RUN, STANDBY, LP_OFF (Low-power Off), and QPU_OFF modes (even lower power consumption modes) are device operating modes.
Safety Features
- Monitors the OV/UV of the external regulator voltage generated by the device.
- On-demand ABIST (Analog Built-in Self-Test)
- Control the built-in WD Timer via I2C, and monitor the watchdog output of an external processor with WDI (watchdog input)
Programmability
- OTP memory allows programming of output power, OV/UV monitoring voltage, power sequence and specific functions
- During the development phase, you can program and test custom OTPs on the evaluation board:
- Provides a GUI tool to support the creation of custom OTPs:
package
- HVQFN48: HVQFN 48 pins, Wettable flank, 7 x 7 x 0.85 mm, 0.5 mm pitch

Figure 24: PF7100 Application Block Diagram
- source: PF7100, 7-channel power management integrated circuit for high performance applications - Data Sheet
PF8100/PF8200 Family
- [ NXP Official ] PF81-PF82 12-channel power management integrated circuit (PMIC) for high-performance processing applications
The PF8100/PF8200 is a family of multi-channel power and power management PMIC devices developed for automotive and industrial applications. The devices are ideal for powering applications with NXP's i.MX series, S32 series processors, as well as processors from other manufacturers.
The PF8100/PF8200 can be used as a power supply for a variety of applications, including infotainment, telematics, cluster, in-vehicle networking, ADAS, vision, sensor fusion, etc. The functional safety level of the PF8200 is up to ASIL B (D), and the PF8100 is QM.
The PF8100/PF8200 integrates 7x Buck (Step-Down Converters), 4x LDO (Linear Regulators), and 1x RTC LDO to power the processor and peripherals.

Figure 25: Appearance of PF8100

Figure 26: Appearance of PF8200

Figure 27: Block diagram of PF8100 and PF8200
Features of PF8100/PF8200
*Functional differences from FS23 are shown in bold and red.
power management
- Input voltage is maximum 5.5V DC
- SW1, SW2, SW3, SW4(Buck):
- Single-phase mode: 0.4V to 1.8V @ Max. 2.5A, 1.5% accuracy
- Dual-phase mode: SW1&SW2,SW3&SW4 can be configured to bundle outputs to a maximum of 5A power supply.
- Triple-phase mode: SW1&SW2&SW3 can be configured to bundle outputs to a maximum of 7.5A power supply.
- Quad-phase mode: SW1&SW2&SW3&SW4 can be configured to bundle outputs to a maximum of 10A power supply.
- SW1, SW2, SW3, SW4 features DVS (Dynamic Voltage Scaling) function
- SW3 features VTT (Voltage Termination) termination mode for use with DDR memory power supplies. - SW5(Buck): 1.0V to 4.1V @ max. 2.5A, accuracy 2%
- LDO1、LDO2: 0.8V~5V@Max. 400mA, Accuracy 3%. Load switch function turns outputs on/off individually.
- LDO2 can be controlled by hardware or software. - VSNVS1 (RTC LDO): 1.8V/3.0V/3.3V @ 10mA max. For powering the processor's RTC (Real Time Clock) domain.
- VSNVS2(RTC LDO):0.8V/0.9V/1.8V@Max. 10mA.
*DVS (Dynamic Voltage Scaling) is a function that dynamically adjusts the output voltage according to load fluctuations.
*VTT (Voltage Termination) is a power supply dedicated to DDR memory, providing a reference voltage to the memory bus to enable accurate data transmission.
System Capabilities
- Flexible device configuration with OTP (one-time programmable) memory
- Communication Interface: 32-bit I2C with CRC (up to 3.4MHz)
- Switching frequency spectrum spread and manual frequency adjustment mode
- The state machine controls four power operation modes (RUN, STANDBY, LP_OFF, QPU_OFF), providing excellent low power consumption and fast wake-up performance.
- TSD (Thermal Shutdown): Chip overtemperature protection
- 24-channel AMUX (Analog Multiplexer): that supports various voltage monitoring: Monitors battery voltage and internal voltage to reduce BOM
- PGOOD pin output and monitoring: Open-drain output programmable for PG (Power Good) indicator or GPO (General Purpose Output)
-
PGOOD output and monitoring: Open-drain output programmable as a PG (power good) indicator or GPO (general purpose output).
- Used as PG indicator: Asserts the PGOOD pin when all PGx signals go high as a result of OV/UV monitoring of enabled regulators.
- Used as GPO: The timing of asserting the PGOOD pin during power sequencing can be programmed by OTP. -
The XFAILB pin synchronizes the power ON/OFF sequences between multiple PMICs. Bidirectional open-drain output pin.
- XFAILB mode: When an internal fault is detected and a power OFF event occurs, the XFAILB pin is asserted to notify other PMICs before executing the OFF sequence.
- XINTB pin: The INTB pin of the PMIC used in combination is fed to XINTB to trigger an interrupt event in the device, allowing the MCU to identify the interrupt source.
- EWARN pin: Notifies the outside world that a power outage event will occur soon due to fault detection.
- FSOB pin: Safety output. Keeps the system in a safe state during power up or a fail event.
*RUN, STANDBY, LP_OFF (Low-power Off), and QPU_OFF modes (even lower power consumption modes) are device operating modes.
Safety Features
- Monitors the OV/UV of the external regulator voltage generated by the device.
- On-demand ABIST (Analog Built-in Self-Test)
- Control the built-in WD Timer via I2C, and monitor the watchdog output of an external processor with WDI (watchdog input)
Programmability
- OTP memory allows programming of output power, OV/UV monitoring voltage, power sequence and specific functions
- During the development phase, you can program and test custom OTPs on the evaluation board:
- Provides a GUI tool to support the creation of custom OTPs:
package
- PF81/PF82 Automotive:HVQFN56: HVQFN 56 pins, Wettable flank, 8 x 8 x 0.85 mm, 0.5 mm pitch
- PF81 Industrial:HVQFN56: HVQFN 56 pins, 8 x 8 x 0.85 mm, 0.5 mm pitch

Figure 28: PF8100/PF8200 Application Block Diagram
summary
NXP's automotive PMIC is a highly functional power management IC designed for automobiles. NXP's PMIC integrates multi-channel power supply, power management, voltage monitoring, and safety functions at the system level, achieving high efficiency, high reliability, space saving, and optimized power management. Since the OTP memory allows easy change of settings such as output voltage, power sequence, and monitoring functions, introducing it into platform development will help reduce development efforts.
If you are interested in NXP's automotive PMICs, please contact NEXTY Electronics.
Page 2: NXP's automotive PMIC portfolio and key product features explained
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